Documentation: https://arkenidar.github.io/resm_aka_bbjj/
https://github.com/arkenidar/resm_aka_bbjj
Raw Execution-Step Machine also known as Bit Bit Jump Jump machine
Simple computer design. Files and ideas, documentation to the concept of BitBitJump machine, extended, popularized, applied.
My explorations of "Bit Bit Jump Jump" *uniform instruction set* CPU design.
A few introductory words
[IT] concetto di computer minimo, avente istruzioni uniformi, implementato con circuito (hardware) e con interprete di questo tipo di istruzioni (software)
[EN] concept of minimal computer, having uniform instructions, implemented with circuits (hardware) and with interpreter of this type of instructions (software)
I did put together some documentation and interactive material about my Explorations of Bit Bit Jump Jump "uniform instruction set" CPU design. This design is a direct application of Turing Machines and flow-charts, and is able to show its validity across centuries if given the chance, since it is the quintessence of binary computing.
Rediscovery of this machine design
I would like to pass on this knowledge so other people may experiment and re-apply the knowledge and wisdom contained herein. My only role and merit could be having documented a little bit the already existing BitBitJump design, but this is not to be underestimated because precious knowledge tend to be lost in time if not valued and actively preserved.
Possibly, with sufficient resources this design can be rediscovered, as I did for example. I have used again the more popular name "Bit Bit Jump Jump Machine", but if I had to choose a new name I would have labeled this machine design: R.E.S.M. (Raw Execution-Step Machine). The rest of the paragraph is more theoretical, I hope no one is hurt by these words ;). This design features energetic transference and pathways formation, found in many other systems, including neural living systems, but this machine is not so similar to living systems, as the program (and pathways definition) is constant in time. However programs can be executed using different paths. Energy transference can happen in this machine, of course, whenever a bit copy is done.
Circuital schematics
Use Logisim (http://www.cburch.com/logisim/).
Logisim is a circuit design and emulation software,
free and open source,
cross-platform because it is written in Java+Swing,
works on all major platforms including Windows and Linux and Mac OS.
Logisim file from me for BitBitJumpJump CPU. It is missing proper I/O (using simulator features for I/O into/from memories)
Documentation for circuital schematics and abstract concept of Bit Bit Jump Jump machine
The circuits executes endlessly instructions (no halting in current design). Every instruction is composed of four operands (COPY_FROM, COPY_TO, IP_CASE_0, IP_CASE_1). Every instruction is executed in 3 phases. In phase 1 the bit pointed by the COPY_FROM register is fetched. Then in phase 2 the fetched bit is written in the memory location pointed by COPY_TO. This is the bit copying, "Bit Bit" part of the BitBitJumpJump instruction type. In phase 3, the "Jump Jump" part, the registers IP_CASE_0 and IP_CASE_1 are used to specify where to jump, selecting the next instruction. If Program Path Selector (PPS) is 0 the IP (Instruction Pointer) will have the value contained in IP_CASE_0, otherwise, for PPS=1: IP <- IP_CASE_1 (IP will have the value of the associated register). PPS register can be written when the destination (COPY_TO register) is equal to 0x02 (third bit of RAM, RAM has single-bit words, this is a feature possible in Logisim). So copy by copy, and path selection by path selection the program processes data. I/O is usually implemented using a special Input memory location and a special Output memory location. I will do that ASAP, for now I am using the simulator ways to insert bits and to show bits.
More informations on this machine, with further exploration directions and ideas
The "Bit Bit Jump Jump machine/CPU" is Turing complete, so it is a matter of coding the proper instructions but every computation can be done. This concept of computational machine is very educational and straight to the essence, and should be more commonly and widely known. I intending to document and to spread knowledge and I hope this will be successful and appreciated in due time, by wise people who can reap the wisdom of this beautifully simple design and concept. This machine has no concept of "words", so it is not 32 or 64 bit but words can be composed of an arbitrary number of bits, given a proper quantity of associated instructions. This is another beautiful feature of the essentialness of this design. More to come: stay tuned! One last word: this extremely expanded way to describe computation is useful for rewriting programs in different ways, e.g. size-optimizing programs, in a very granular and thorough way. Some one has used this way to obfuscate programs (and that is a kind of rewrite certainly) but the real deal AFAIK will be experimenting code-optimizations by code-rewriting. Also this is an abstract representation that could possibly be used as an intermediary representation when converting a program code from one format to another, e.g. in case of porting from a CPU architecture to another. Indeed every program is the equivalent of a flowchart where every instruction is an assignment activity (rectangular shape) followed a decision (diamond shape). So again you can shape this at will and write any kinds of programs (I/O is made this way: for input "var <- in" activity and for output "out <- var" activity).
Bit Bit Jump Jump programs and its interpreter/VM (Software Versions of VM and related tools)
I wrote many versions of software implementations of Virtual Machine and related tools (such as compilers). Example programs (for this kind of machine and its variations) are included.
- A JavaScript-based version: Bit Bit Jump Jump programs and interpreter using web standards.
- A Python-based version. It can parse textual format of this type of VM (*.prg.txt files). This project includes the most complex program I wrote for this machine so far, without an automation tool like a compiler: a program that sums 2 bytes that produces an output of 1 byte and 1 bit for carry. No compiler was used, only a text-editor, but using a compiler writing more complex programs should be easier and possible.: https://github.com/arkenidar/CopyJumpMachine
- A Java-based version: It can parse numeric format of this type of VM (*.cj) and convert from textual format (*.prg.txt) to numeric format (*.cj). https://github.com/arkenidar/copyjumpvm. This is a "copy+jump only" virtual machine. You can execute the program in file: "copyjumpvm/integer_counter.cj" for a quick demo (a program that counts a byte from 0 to 255).
Flow-charts of Bit Bit Jump Jump programs
Use Violet (https://sourceforge.net/projects/violet/).
Violet is a UML Editor, you can draw flow-charts and more,
free and open source,
cross-platform because it is written in Java,
works on all major platforms including Windows and Linux and Mac OS.
Violet files from me for program flow-charts. Programs: not gate, or gate.
Flow-chart of "NOT gate" Bit Bit Jump Jump program
Flow-chart of "OR gate" Bit Bit Jump Jump program
Answers to Common question a.k.a. Frequently Asked Questions
- Is this a Turing machine? Answer: No, because it has at least one difference: Turing machine has a tape so the next instruction could be the previous or the following position (contiguous access a.k.a. linear access) in the tape. In this design the next instruction could be any instruction, including the current instruction (arbitrary access a.k.a. random access). This design has Turing completeness, however, likewise many other Turing-complete systems that are not Turing machines, even if it is an inspiration for the design of a computational system.
- Is there any possibility of facilitating programs design? Answer: A software that translates a more human-friendly language to this executable instruction format is of possible realization. This is what is commonly called a "compiler". Compiling from C or BASIC to RESM format is a possible way to go. It would be also possible to implement other systems on top of this, for example an interpreter. That would allow to execute programs in other, possibly more human-friendly, formats. Note that today is common practice that a Central Processing Unit (CPU) is implemented using microcode (my computer use proper CPU microcode, I installed an Ubuntu Linux package for this), so this is a very common and successfully tested way to build on top on microcode systems (the RESM code could be considered microcode so this discourse applies, building higher level on low-level or in this case very very low-level).
- Is there any possibility to speed up the execution of the programs in this system? Answer: The clock frequency can be a factor in the speed of the circuit (more instructions per second). Another factor is the rewriting of the programs to speed up (e.g. less instructions to execute a task). Another speed factor is the parallelization, the use of many of these circuits in parallel. The program would be "spread over" many of this circuits, many cores. The circuits are possibly synchronized (they would use the same phase timing signals), and keeping them in sync is facilitated by the same time requirement for each instruction in each "core" (multi-core design). An FPGA or an ASIC could be used to physically implement this "many micro-cores" design. The FPGA would be programmed using the native and possibly closed tools, but the resulting circuitry could be programmed using RESM microcode, a more open, well-known and free-to-use format. Just-In-Time (JIT) code production and reconfigurable (re-programmable on the field) computing style are quite well suited for these designs. These reconfigurability using a low-level language could be labeled as "low-level reconfigurability" (on FPGA or ASIC). That would allow run-time optimizations, besides static compile time optimizations. The cores would communicate using I/O ports (i.e. specific dedicated memory addresses, like the I/O of the single-core version).
- Do you foresee other uses of this design? Answer: A possible use is in the context of software synthesis: the program format allows micro-mutations. This could be paired well, in my estimations, with genetic programming, even if making the coupling work may require addition insights.
- How about creating or presenting it to communities? Answer: I like the idea of presenting a VHDL/Verilog design to LibreCores. Also crowd-funding some project and/or research based on it could be another way to go, possibly.
- Are there any further directions to explore? Answer: Self-modifying code could be used. This could open a way to reduce code size by allowing the program to write the program, then there is a possibility to "decompress" the program, even progressively (not in one sigle stage, but as an intertwined process of execution and production of code.
... and now for a motto: life is unpredictably short so open the sources #open_the_sources #memento_mori